Samsung S3C2440 Application Processor (Part One.)

The current mainstream among household appliances and electronics is gaining more and more momentum. A processor with a clock speed of 1 GHz in a device that fits in your pants pocket is no longer a dream but a reality. Indeed, there are already quite a few announcements of similar smartphones / communicators impressively with a powerful computing base as well as quite good other characteristics. And now it became to me how these mobile processors work, namely the processor located inside my mobile companion based on the ARM architecture - Samsung S3C2440.


ARM Architecture (formerly Advanced RISC Machine - an advanced RISC machine, predecessor - Acorn RISC Machine) - 32-bit microprocessor-based architecture with a reduced instruction set (RISC), developed by ARM Limited. These processors have low power consumption, so they are widely used in embedded systems and dominate the market for mobile devices for which low power consumption is important.

The processor is based on the core of Arm 9.
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General characteristics:
Family Architecture Version Cache (I / D) / MMU Typical MIPS at MHz
ARM9E ARMv5TEJ 16 KB / 16 KB, 220 MIPS @ 200 MHz,

The ARM Architecture Reference Manual has long existed that demarcates all types of interfaces that ARM supports, as the implementation details of each type of processor may vary. The architecture has evolved over time and since ARMv7, 3 profiles have been defined: 'A' (application) applications, 'R' (real time) - in real time, 'M' (microcontroller) microcontroller.

Profiles can support fewer commands (commands of a certain type).

The ARM architecture contains the following features of RISC:
Load / Storage Architecture
No support for non-linear (non-word aligned) memory access (now supported on ARMv6 processors with some exceptions)
Uniform 16x32-bit register file
Fixed instruction length (32 bits) to simplify decoding by reducing code density. Later Thumb mode increased code density.
Single cycle performance

To compensate for the simple design, in comparison with modern processors like the Intel 80286 or Motorola 68020, some design features were used:
Arithmetic instructions replace conditional codes only when necessary.
32-bit multi-register cyclic shift device, which can be used without performance loss in most arithmetic instructions and address calculations.
Powerful indexed addressing modes
Link register for quick calling leaf functions
Simple, but fast, with two levels of priorities of the interrupt subsystem with the included banks of registers.