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Intel Quartus Prime - everything you need to work with Intel FPGA



In 2015, Intel acquired Altera, one of the most famous FPGA and SoC developers. Gradually, all Altera products β€” both hardware and software β€” changed their name, in particular, Altera Quartus FPGA design software became known as Intel Quartus Prime . We often mentioned it in connection with the release of the next Intel FPGA, but never described in detail. Now there is time to do it, especially since since the name change, several large releases have already come out, bringing new functionality and support for new devices.

So, Intel Quartus Prime contains everything you need to design systems based on Intel FPGA, SoC and Complex Programmable Logic Device (CPLD), starting with the very basics and including further interaction debugging, optimization, verification and modeling. Currently, there are three delivery options for Quartus Prime:


Compatibility matrix for version 18.1 is as follows.
DevicesProStandardLite
Stratix IV, Vβœ“
Intel Stratix 10βœ“
Arria IIβœ“
Arria II, Vβœ“
Intel Arria 10βœ“βœ“
Cyclone IV, Vβœ“βœ“
Intel Cyclone 10 LPβœ“βœ“
Intel Cyclone 10 GXβœ“
Intel MAX seriesβœ“βœ“

Now about the main functionality - again, with reference to different versions of Intel Quartus Prime. More information can be found on the product page .
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FunctionalProStandardLite
Design Flow
Partial reconfiguration allows you to change the configuration of the FPGA part dynamically, while the rest of the design continues to function.βœ“βœ“βœ“
Fast recompilation - the compiler re-uses previous analysis and fitting results when possible and does not preprocess unchanged block designβœ“βœ“
Block design - incremental block compilation and reuse block designβœ“
Incremental optimization - the traditional fitting stages are subdivided into thinner sub-steps for better flow control.βœ“
Design Entry
Multiprocessing support - reduced compilation timeβœ“βœ“
IP suite of intellectual property licenses for the most popular FPGA architectures and interfacesβœ“βœ“
Intel HLS compiler is a high-level synthesis tool that accepts C ++ input and generates RTL product quality code optimized for Intel FPGAβœ“βœ“βœ“
Platform Designer - automatically generates interconnect logic for connecting IP functions and subsystems; Pro version has additional functionalityβœ“βœ“βœ“
Chip Planner - Shows a visual representation of chip resources.βœ“βœ“βœ“
Interface Scheduler β€” Learns device peripheral architecture and efficiently distributes interfaces.βœ“
Regions of logical blocking - a directive fitter to place certain elements or nodes within the same regionβœ“
Functional simulation
ModelSim-Intel FPGA edition software is a special version of ModelSim software for Intel FPGA, including behavioral analysis, HDL tests and execution of TCL scriptsβœ“βœ“βœ“
Synthesis
Vhdlβœ“βœ“βœ“
Verilogβœ“βœ“βœ“
SystemVerilogβœ“βœ“βœ“
VHDL-2008βœ“
With the terms of licensing Intel Quartus Prime and its components, as well as their value, you can find on the Intel website .

Source: https://habr.com/ru/post/459428/


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