The new standard based on PCIe 5.0 will “connect” CPU and GPU - what is known about it
The CXL consortium introduced a new open standard - Compute Express Link ( CXL ). It will help organize high-speed communication between the processor and other devices - GPU, FPGA and memory. CXL 1.0 is based on a PCIe 5.0 interface, the specification of which is expected this year . Let's talk about the technical details and analogues of the solution.
/ Wikimedia / CINECA / CC BY
The need to process and encrypt large amounts of data, the development of AI systems and MO algorithms has led to an increase in the popularity of heterogeneous solutions. In them, general-purpose processors work together with accelerators — GPUs, FPGAs, and ASIC microcircuits. Each component specializes in performing a specific task, which improves system performance.
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When processing large amounts of data (for example, in data centers), channels for the exchange of information between heterogeneous components sometimes become a bottleneck. To minimize delays , the CXL consortium (which includes cloud providers and data center hardware developers) introduced the Compute Express Link standard.
It is based on the interface PCI Express 5.0, designed to connect server components. This means that the standard will support bandwidth between computational elements of up to 128 GB / s on 16 lines. At the same time economical coding 128b / 130b, implemented in PCI Express 3.0, will be used.
Schematically, the connection can be represented as follows:
CXL has three interface methods. The first is I / O mode for sending commands and updating device status. The second is a memory protocol for sharing RAM between the host and the accelerator. The third is an interface that will ensure memory coherence.
The PCIe 5.0 bus is specifically designed for solving problems that require maximum throughput — working with graphics processors, network technologies, and high-load systems. Therefore, the developers of CXL expect that the new standard will be in demand by machine learning institutes and data center operators. Since the technology is “ sharpened ” for GPU, FPGA, ASIC and other accelerators, it most likely will not be used in the architecture of custom PCs.
In the IT community, there is an opinion that the new standard may not be widely adopted. Since the industry has enough similar standards and specifications, such as CCIX and GenZ (we'll talk about them below). Widespread adaptation of the standard can prevent its distribution model. Although Compute Express Link is an open standard, only members of the consortium have access to its full specification. And while it is not clear whether they will compete with each other in the market after the release.
/ Wikimedia / BiomedNMR / CC BY-SA
As we mentioned above, the CXL has several analogs, including GenZ and CCIX.
The GenZ bus specification, which is called the “possible successor to PCIe,” was released in February 2018. About fifty large IT companies took part in its development. The purpose of the standard is no different from the objectives of CXL - to increase the speed of data exchange between the processor, memory and graphics cards.
Representatives of the consortium claim that Gen-Z bypasses the point-to-point connection constraint that is present in PCIe and accesses memory directly. The specification is ready and is in the public domain on the consortium site.
CCIX is another consortium that includes eminent corporations. The first specification of the standard of the same name came out in the summer of 2018. It is based on PCIe 4.0, which allows a bandwidth of 25 GB / s to be achieved.
The concept of architecture based on the first CCIX specification has already been implemented by Xilinx in its Versal chip on FPGA . In the near future, other market players are planning to introduce CCIX, some of them have already submitted test implementations.
At least two consortia are already ahead of CXL in the speed of specification development. However, there is a chance that the advantages of the PCIe 5.0 standard will help CXL outperform competitors and become the industry standard for manufacturers of processors and heterogeneous systems. Devices based on this technology will help speed up work with data in the data center and the cloud, will find application in the development of AI systems and HPC solutions.
/ Wikimedia / CINECA / CC BY
Why did you need a new standard
The need to process and encrypt large amounts of data, the development of AI systems and MO algorithms has led to an increase in the popularity of heterogeneous solutions. In them, general-purpose processors work together with accelerators — GPUs, FPGAs, and ASIC microcircuits. Each component specializes in performing a specific task, which improves system performance.
')
When processing large amounts of data (for example, in data centers), channels for the exchange of information between heterogeneous components sometimes become a bottleneck. To minimize delays , the CXL consortium (which includes cloud providers and data center hardware developers) introduced the Compute Express Link standard.
What is known about the standard
It is based on the interface PCI Express 5.0, designed to connect server components. This means that the standard will support bandwidth between computational elements of up to 128 GB / s on 16 lines. At the same time economical coding 128b / 130b, implemented in PCI Express 3.0, will be used.
Schematically, the connection can be represented as follows:
CXL has three interface methods. The first is I / O mode for sending commands and updating device status. The second is a memory protocol for sharing RAM between the host and the accelerator. The third is an interface that will ensure memory coherence.
What we write about in the corporate blog:
Potential and disadvantages
The PCIe 5.0 bus is specifically designed for solving problems that require maximum throughput — working with graphics processors, network technologies, and high-load systems. Therefore, the developers of CXL expect that the new standard will be in demand by machine learning institutes and data center operators. Since the technology is “ sharpened ” for GPU, FPGA, ASIC and other accelerators, it most likely will not be used in the architecture of custom PCs.
In the IT community, there is an opinion that the new standard may not be widely adopted. Since the industry has enough similar standards and specifications, such as CCIX and GenZ (we'll talk about them below). Widespread adaptation of the standard can prevent its distribution model. Although Compute Express Link is an open standard, only members of the consortium have access to its full specification. And while it is not clear whether they will compete with each other in the market after the release.
/ Wikimedia / BiomedNMR / CC BY-SA
Similar standards
As we mentioned above, the CXL has several analogs, including GenZ and CCIX.
The GenZ bus specification, which is called the “possible successor to PCIe,” was released in February 2018. About fifty large IT companies took part in its development. The purpose of the standard is no different from the objectives of CXL - to increase the speed of data exchange between the processor, memory and graphics cards.
Representatives of the consortium claim that Gen-Z bypasses the point-to-point connection constraint that is present in PCIe and accesses memory directly. The specification is ready and is in the public domain on the consortium site.
CCIX is another consortium that includes eminent corporations. The first specification of the standard of the same name came out in the summer of 2018. It is based on PCIe 4.0, which allows a bandwidth of 25 GB / s to be achieved.
The concept of architecture based on the first CCIX specification has already been implemented by Xilinx in its Versal chip on FPGA . In the near future, other market players are planning to introduce CCIX, some of them have already submitted test implementations.
Future standard
At least two consortia are already ahead of CXL in the speed of specification development. However, there is a chance that the advantages of the PCIe 5.0 standard will help CXL outperform competitors and become the industry standard for manufacturers of processors and heterogeneous systems. Devices based on this technology will help speed up work with data in the data center and the cloud, will find application in the development of AI systems and HPC solutions.
What else to read in our blog on Habré:
Source: https://habr.com/ru/post/443984/
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