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What engineers in Apple and Intel are doing in the office: career guidance online course on modern microelectronics for schoolchildren

Recently, a free online course was published in three parts entitled “How the creators of smart nanochips work” ( 1 , 2 , 3 ). It is intended for vocational guidance of schoolchildren and is very specific: this is how the distribution of work in the chip design team looks, development is built on such design concepts at the register transfer level, and these algorithms are used to determine how many megahertz the designed processor for a computer or automotive electronics.

In addition to theoretical vocational guidance, the course can be used to select schoolchildren for practical summer schools on FPGAs and processor design. Such a school is planned this year in Zelenograd, its prototype was tested at the Summer School for Young Programmers in Novosibirsk and at the Electronics Week for Schoolchildren in Kiev the year before last. You can also try to make a hackathon on hardware-implemented neural networks and hardware implementation of games with output to a VGA display (more on this later in the post).



Briefly about what is included in each of the three modules - "From the transistor to the chip", "The logical side of the digital circuitry" and "The physical side of the digital circuitry."
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The course “How Creators of Smart Nanochips Work” begins with absolute zero, so its first part, “From Transistor to Chip,” largely repeats other materials on electronics for schoolchildren that were created in the last 50 years - what is a transistor, logic elements, binary numbers and triggers. The concept of the D-flip-flop inside the modern iPhone remains the same as in the Kvant magazine in 1986. Transistors have decreased a thousand times, but their essence has not changed.

The only block of information that was not in the previous courses is about the so-called standard cells (standard cells), on the technology of which an overwhelming number of modern specialized circuits are built. They look like this:



Try to answer the question from the test below, and if you know the answer, you can skip the first module of the course:
Why are standard cells of modern microcircuits (ASIC standard cells) called standard?
  1. Oh, I know! This is because they implement standard logic functions AND, OR, NOT
  2. Transistor elements in standard cells have standard chemical composition
  3. Standard cells operate at standard clock speeds.
  4. They have a standard height (dimension on the area), which simplifies the supply of power to them and their automatic connection between them
  5. The standard cell structure was once standardized by some European standards committee.

Correct answer:

Hidden text
4. Standard cells (ASIC standard cells) have a standard height (dimension on the area), which simplifies supplying power to them and automatically connecting them to each other.



If you do not know, you can pass the first module of the course - "From the transistor to the chip." Here is its content:



If the most part of the first module of the course “How the Creators of Smart Nanochips Work” speaks about the same things that have been in popular texts for schoolchildren since the 1970s, in the second part, The Logical Side of Digital Circuit Engineering, we enter the area Kvant magazine did not exist, and which in general in Russian education was abandoned due to the collapse of the USSR. This is the so-called RTL-to-GDSII route, methods for designing a plan for locating billions of transistors and microcircuit tracks based on code compilation / synthesis in Verilog and VHDL hardware description languages. Failure in this area must be overcome, starting at the level of advanced students. Otherwise, there are no truly Russian iPhones, robots, and self-driving cars.



In the past few years, there has been an impetus in Russia to popularize the design of digital circuits through the synthesis of hardware description languages, including the release of the free textbook by David Harris and Sarah Harris, Digital Circuit Design and Computer Architecture, in Russian . Posts on Habré about this textbook received more than 300 thousand views, and downloads were twice flooded with the British site Imagination Technologies. The final revised version of the tutorial has recently been released, which you can download from the link from the MIPS website . True, the link works only under Windows, and on the Mac and under Linux is buggy. If you have problems with it, you can download the same version from here . Or buy a paper book from the DMK Press on Ozone or in the Labyrinth.



The module "The Logical Side of Digital Circuit Engineering" of the course "How Creators of Smart Nanochips Work" uses the example of a smiling snail from Harris. A “snail” is a state machine that recognizes sequences of zeros and ones. The course understands the source text of the “snail” automaton in the Verilog hardware description language, and also introduces the concepts of the finite automaton state diagrams and signal waveforms. After that, an electronic circuit synthesized from the description is demonstrated, with logic elements and and D-triggers for storing the state of the finite automaton "snail".





Based on the example of a “snail”, students on hackathons can synthesize various “combination locks” for FPGA boards. In the exam for the course “How do the creators of smart nanochips work”, there is a question about the state diagram of the so-called “Chinese room” finite automaton - a popular example from the field of artificial intelligence. Here is a diagram of a simple finite-state machine for dialogue using Chinese characters. If you give him a combination of several hieroglyphs "tree" and "bear", followed by the hieroglyphs "science", the machine will give a sequence of characters "Siberia" - this example was born during a seminar for schoolchildren in the Novosibirsk Academgorodok:



The third part, “The Physical Side of Digital Circuitry”, describes how the graph from logic elements, synthesized in the second part, is decomposed on a microchip and turned into a drawing in GDSII format, which is actually sent to the factory where the chips are baked. This part also discusses placement and tracing algorithms that will be interesting to mathematically-oriented students. Research in the field of microchip design automation is a popular area among former winners of mathematics and media.



This is how a chip project looks like after placement and tracing using Synopsys IC Compiler:



But this elegant fractal structure is a clock signal tree inside the chip, built so that the clock signal comes to all D-triggers at about the same time. The width of the “branches” of this tree varies from thick to thin metal connections on a microchip to meet the physical limitations of copper conductors at the nanometer level of semiconductor technology:



And here is an illustration of the so-called wave-tracing algorithm (Maze Routing in English - “Search for paths in the maze”). This algorithm was used in early design automation programs for connecting logical elements of a circuit. The wave-tracing algorithm is so simple that a capable high school student can write it himself on C, Python or Java. This is a useful exercise for those who plan to write much more complicated algorithms in the future, for example, for future 3D chips:



What should schoolchildren do after mastering the concepts of designing digital circuits on Verilog? Exercises in the simulator or with flashing lights on the FPGA board, although necessary, but rather annoying, and designing simple processors and neurocalculators are only interesting to a small percentage of students who decide to master computer architecture. Fortunately, these two areas are not limited to exercises for schoolchildren.

Just two months ago, Designing Video Game Hardware in Verilog by Steven Hugg was published, which describes the design of game circuits on Verilog, implemented in FPGA connected to a VGA display. We are talking about video games of the 1970s and 1980s, with the generation of sweep, frame buffer, sprites. Atari ping pong, space wars, tanchiki. Gaming machines for these games, first, back in the 1970s, were assembled on chips of a small degree of integration, then on PAL and microcontrollers, including the Motorola 6502, which was used in the first Apple. The Stephen Hagg book also understands the hardware implementation of sprites familiar to Soviet programmers and gamers of the second half of the 1980s using the Texas Instruments TMS9918 video processor, which was installed in Japanese Yamaha MSX computers imported at that time into Soviet schools.

The Hagg book is useful not only and even not so much to the nostalgic eccentrics. This is an excellent set of tasks for modern students and schoolchildren who are starting to learn electronics. Since the tasks are old, but the technologies — Verilog, logic synthesis, FPGA prototyping — are new, the same ones that are being studied now in the 2018-2019 academic year at MIT in the course 6.111 . Without simple exercises with Verilog and FPGA, engineers who are now sitting in Santa Clara in Intel, NVidia and AMD, in Cupertino at Apple and other electronic companies would not grow.





Summing up. It would be good if now a certain number of school and university teachers would check out the course “How Creators of Smart Nanochips Work”, after which they would send interested students to it. Then for schoolchildren who will receive a certificate of this course, you can invite to a practical seminar with FPGA boards (some of which are distributed as prizes for successful projects). Such seminars are now being discussed in Zelenograd, Moscow, there is also interest in Sochi, Minsk and other places. In the long term, the chip developer community in Russia will grow, which has developed in Silicon Valley, Japan, Taiwan, South Korea, the United Kingdom, is now taking shape in Shanghai and other places. This is something that should exist in every large technically advanced country, and in Russia there are enough traditions in mathematics, physics and engineering sciences to support this development.

Source: https://habr.com/ru/post/443234/


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