What's New: Details on the implementation of the new Zen 2 architecture have become known
Earlier this month, AMD told about Zen 2. The first chips are expected as early as 2019. We talk about the features of the architecture and what it will give in the context of AMD vs Intel.
/ Photo Fritzchens Fritz PD / 14nm AMD Zeppelin
Zen 2 was developed with an eye on the 7-nm process technology. The company said that the transition to 7-nm will increase productivity by 25%, while maintaining the level of energy consumption.
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To perform a single operation, Zen 2 chips require 50% less power. This will have to happen in modern data centers, for which the parameters of energy efficiency of equipment are important (by the way, EPYC chips, which we describe below, were created specifically for work in the data center). At the same time, the chips have smart power management functions. They can dynamically change the voltage level depending on the load of the cores. Algorithms independently reduce the core frequency if they realize that possible delays will not affect the work load.
AMD made a number of changes to the architecture of Zen 2, compared with its predecessors. Some of them touched vector registers and IPC index (instructions per cycle).
Vector registers expanded. Their size has increased from 128 to 256 bits. This doubled the performance of AVX operations with floating point numbers. Now 256-bit AVX-operations do not need to be split into two 128-bit micro-operations. Therefore, Zen 2 showed a result of 16 FLOPS per clock, like Intel's Skylake architecture.
IPC increased by 20%. The percentage increase was achieved due to load balancing between components of the architecture and cache expansion. The increase in IPC has improved performance by 13% compared with Zen +. Note that Zen + exceeds Zen in this indicator by only 2–5%.
This chip will be the server processor EPYC Rome . He will have a structure that AMD calls Chiplet Design. The layout of the chip involves connecting a 7-nm CPU with a 14-nm I / O chip. The processor will contain eight computing units located around a 14-nm chiplet. The connection is provided via the InfinityFabric bus without direct silicon compounds. Each block will contain eight cores - a total of 64 cores.
EPYC Rome processors can handle 128 threads simultaneously. The memory interface will support an eight-channel DDR4 controller, which will provide the chip with access to four terabytes of DRAM per socket.
In addition, the processor will receive support for PCIe Gen 4, which will double the number of gigatransactions per second - from 8 to 16 GT / s.
In September , the results of testing the new CPU in the multi-threaded benchmark Cinebench R15 leaked to the network - 12587. This is more than any of the current generation processors of the company (the result for AMD Ryzen Threadripper 2990WX is 5500).
Now AMD has already begun to deliver the first samples of EPYC Rome processors to its customers and server manufacturers. Mass deliveries of new devices will begin in 2019, at the same time we can expect the appearance of these chips in data centers.
The general manager of AMD Forest Norrod (Forrest Norrod) in the summer said that the EPYC Rome server CPUs were designed to compete with Intel's 10-nm solutions like Ice Lake-SP. However, Intel for a long time postponed the release of new-generation chips due to problems with the release of usable chips. The release is scheduled for 2019, but the exact release date of the Intel processors on the new process technology remains unknown.
Thus, Intel will have to compete with new AMD processors with the help of the "old" Cascade Lake-SP family. Therefore, AMD expects that the chips based on the Zen 2 otvoyuyut from Intel primacy in performance. But they still do not harbor any special illusions - it may not work out for a long time.
Representatives from AMD believe that, in the end, competitors will present an architecture similar to Zen 2. Intel is expected to receive a retaliatory strike from AMD by the end of 2019.
/ Photo Fritzchens Fritz PD / 14nm AMD Zeppelin
Analysts predict that while Intel will adjust the production of 10-nm, AMD stock price will rise by 15%. But when the new Intel processors see the light, AMD will immediately lose 4% of the stock value. And then their price will continue to decline. Experts believe that neither Zen 2, nor the use of 7-nm process technology will not help AMD keep a temporary advantage in the market.
Design Zen 2 has been officially completed . Server processors will appear on the market at the end of this year, and desktop solutions - in 2019.
AMD also confirmed that the development of Zen 3 technology 7nm + is in full swing and will end in 2020. There are conflicting rumors about Zen 4. WikiChip Fuse reported that the development of the architecture has already begun, and the WCCFTECH is writing , allegedly Zen 4 decided to skip and go directly to Zen 5.
Zen 5 plan to produce on the 3-nm process technology and news on this architecture should not be expected before 2020.
PS Materials from our corporate blog:
PPS We also write about IaaS and related topics in the corporate Telegram channel:
/ Photo Fritzchens Fritz PD / 14nm AMD Zeppelin
What changed
Zen 2 was developed with an eye on the 7-nm process technology. The company said that the transition to 7-nm will increase productivity by 25%, while maintaining the level of energy consumption.
')
To perform a single operation, Zen 2 chips require 50% less power. This will have to happen in modern data centers, for which the parameters of energy efficiency of equipment are important (by the way, EPYC chips, which we describe below, were created specifically for work in the data center). At the same time, the chips have smart power management functions. They can dynamically change the voltage level depending on the load of the cores. Algorithms independently reduce the core frequency if they realize that possible delays will not affect the work load.
AMD made a number of changes to the architecture of Zen 2, compared with its predecessors. Some of them touched vector registers and IPC index (instructions per cycle).
Vector registers expanded. Their size has increased from 128 to 256 bits. This doubled the performance of AVX operations with floating point numbers. Now 256-bit AVX-operations do not need to be split into two 128-bit micro-operations. Therefore, Zen 2 showed a result of 16 FLOPS per clock, like Intel's Skylake architecture.
IPC increased by 20%. The percentage increase was achieved due to load balancing between components of the architecture and cache expansion. The increase in IPC has improved performance by 13% compared with Zen +. Note that Zen + exceeds Zen in this indicator by only 2–5%.
The first chips on the new architecture
This chip will be the server processor EPYC Rome . He will have a structure that AMD calls Chiplet Design. The layout of the chip involves connecting a 7-nm CPU with a 14-nm I / O chip. The processor will contain eight computing units located around a 14-nm chiplet. The connection is provided via the InfinityFabric bus without direct silicon compounds. Each block will contain eight cores - a total of 64 cores.
EPYC Rome processors can handle 128 threads simultaneously. The memory interface will support an eight-channel DDR4 controller, which will provide the chip with access to four terabytes of DRAM per socket.
In addition, the processor will receive support for PCIe Gen 4, which will double the number of gigatransactions per second - from 8 to 16 GT / s.
In September , the results of testing the new CPU in the multi-threaded benchmark Cinebench R15 leaked to the network - 12587. This is more than any of the current generation processors of the company (the result for AMD Ryzen Threadripper 2990WX is 5500).
Now AMD has already begun to deliver the first samples of EPYC Rome processors to its customers and server manufacturers. Mass deliveries of new devices will begin in 2019, at the same time we can expect the appearance of these chips in data centers.
Intel vs AMD
The general manager of AMD Forest Norrod (Forrest Norrod) in the summer said that the EPYC Rome server CPUs were designed to compete with Intel's 10-nm solutions like Ice Lake-SP. However, Intel for a long time postponed the release of new-generation chips due to problems with the release of usable chips. The release is scheduled for 2019, but the exact release date of the Intel processors on the new process technology remains unknown.
Thus, Intel will have to compete with new AMD processors with the help of the "old" Cascade Lake-SP family. Therefore, AMD expects that the chips based on the Zen 2 otvoyuyut from Intel primacy in performance. But they still do not harbor any special illusions - it may not work out for a long time.
Representatives from AMD believe that, in the end, competitors will present an architecture similar to Zen 2. Intel is expected to receive a retaliatory strike from AMD by the end of 2019.
/ Photo Fritzchens Fritz PD / 14nm AMD Zeppelin
Analysts predict that while Intel will adjust the production of 10-nm, AMD stock price will rise by 15%. But when the new Intel processors see the light, AMD will immediately lose 4% of the stock value. And then their price will continue to decline. Experts believe that neither Zen 2, nor the use of 7-nm process technology will not help AMD keep a temporary advantage in the market.
What's next: from Zen 2 to Zen 5
Design Zen 2 has been officially completed . Server processors will appear on the market at the end of this year, and desktop solutions - in 2019.
AMD also confirmed that the development of Zen 3 technology 7nm + is in full swing and will end in 2020. There are conflicting rumors about Zen 4. WikiChip Fuse reported that the development of the architecture has already begun, and the WCCFTECH is writing , allegedly Zen 4 decided to skip and go directly to Zen 5.
Zen 5 plan to produce on the 3-nm process technology and news on this architecture should not be expected before 2020.
PS Materials from our corporate blog:
- Servers for SAP: Basic Platforms
- Unboxing a Cisco UCS B480 M5 Blade Server
- Unboxing all-flash storage NetApp AFF A300: technical specifications
PPS We also write about IaaS and related topics in the corporate Telegram channel:
Source: https://habr.com/ru/post/430846/
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