DE0-Nano-SoC is another minicomputer for creativity

Now on the market there are a lot of various minicomputers. The most common ones are Raspberry Pi, Orange Pi, Odroid. And there is a very popular Arduino platform. But sometimes it happens, so there is a shortage of these common platforms.



For example, I want some kind of minicomputer with not very common CAN, I want ten UART, or maybe I need two dozen fast GPIO legs. How to be?

FPGA + CPU or in this case Cyclone V SoC

One of the solutions to the problem can be DevKit DE0-Nano-Soc. This solution is based on the Altera Cyclone V SE chip, namely 5CSEMA4U23C6N. Which in turn is a combination of the ARM Cortex A9 hardware core in this case, dual-core, and Cyclone FPGA V. Why might such a tandem be needed? But it is needed quite often: FPGA is well suited for fast signal processing, conventional IO pins can work on hundreds of megahertz, and in models with hardware transceivers and up to six gigahertz. And also for parallel, pipelining of incoming signals. However, describing everything in languages ​​like Verilog or VHDL is quite difficult, slow and inconvenient. Therefore, it was quite often the practice to put the implementation of the processor on the FPGA design: specialized NIOS II for Altera, MicroBlaze for Xilinx, variants of AVR cores written by enthusiasts and the like. One of the advantages of this solution is simplicity, added a processor and peripherals to the design and write a program in C / C ++ for them, the disadvantages are that they firstly take up FPGA resources (logic cells, memory blocks, PLL), secondly, it’s enough are slow. And thirdly, despite the various peripherals, it is usually quite simple, that is, you can hardly find DMA support for the UART in the basic set, you can of course write your own, but this is long and rather difficult. With the full characteristics of the chip can be found here . But let's take a closer look at our devkit.

DE0-Nano-SoC

Main chip: Altera Cyclone V SE 5CSEMA4U23C6N

Hardware Core Part (HPS):

• 1GB DDR3 SDRAM (32-bit data bus)
• 1 Gigabit Ethernet
• USB OTG Port, USB Micro-AB (works in both host mode and device)
• Micro sd
• UART to USB, USB Mini-B connector
• Accelerometer (I2C interface + interrupt)
• Buttons: cold reset, warm reset, user button
• Light-emitting diode
• LTC expansion slot

FPGA part:

• EPCS128 for FPGA configuration storage
• Two buttons
• Four switches
• Eight LEDs
• Two 40-pin connectors (36 GPIO + 2GND + 5V Pin + 3V Pin) are standard for Terasic boards .
• Expansion connector compatible with Arduino Uno R3
• 8-channel analog digital converter

findings

The board is powerful enough, has a flexible configuration, and can be used in home-made projects, if you need high speed or non-standard interfaces that can be implemented on the FPGA side. Perfect for skill enhancement in both FPGA design and ARM programming. However, I would not recommend it for initial FPGA training due to the small number of peripherals installed. It is still more than a board for use, in any device, as a ready-made control unit. Well, a little summing up:

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Pros:

• ARM Cortex A9
• FPGA part based on Cyclon V (currently the most advanced chip of the Cyclone family)
• Flexible configuration: the FPGA part can use most of the pins of the HPS part, and in turn, the HPS part can send signals from the periphery (UART / SPi / I2C / CAN) “inside” the FPGA and not just to the specified legs.
• 72 GPIO derived from the FPGA part.
• 8 ADC channels
• 1 Gb Ethernert
• USB OTG port

Minuses:

• Price: $ 99 which is quite expensive against the background of the Raspberry Pi and its analogues
• Difficulty: have to work with both the FPGA and the ARM part
• documentation: documentation on devkit itself is very detailed, but with documentation on the chip itself, everything is bad enough, if the FPGA part is well described, then the HPS is not so rosy, some of the points are not described intuitively and can be said superficially, although the main points still described well.
• Community: it can be said no

Powerful enough and interesting fee, but as always for the flexibility you have to pay complexity to learn. If you have any questions about this board, ask in the comments, I will try to answer.