VISC Revolutionary Microprocessor Architecture

Silicon Valley Startup Soft Machines announced the VISC microprocessor architecture. The architecture, according to the developers, allows several times to increase the performance of microprocessors based on the energy consumed.

The foundation

The basis of the VISC architecture: virtual kernels and virtual hardware threads, changing which allows it to scale. For each clock cycle, 3–4 times more instructions are performed, which improves performance per watt by 2–4 times.

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The new architecture benefits in comparison with CISC and RISC, since in these two cases microprocessors use physical cores and software flows, and this limits the use of transistors, power consumption, and increase in frequency.

Usage example

An example of using architecture. Transfer:

- VISC dynamically allocates resources between virtual cores based on individual application needs

- Performance / watt balanced for both single and multi-threaded applications







The prototype is already there. The functionality of the system is confirmed.







Test results.







The startup, which has been working on this architecture for seven years, was financially supported by Samsung Ventures, AMD, Mubadala, RVC, KACST, RUSNANO and TAQNIA.



The full presentation (in English) can be viewed here .



You can find an article on “death scaling CPU” at this link .