Simple and efficient calculation of Modbus CRC16 in PLC and MK without bitwise shift and tables

The sacred algorithm for calculating the CRC16, described in the literature and associated with a bitwise shift, does not fit well into the format of the computational capabilities of the PLC and MC. First, to the extent that its implementation takes a fair amount of computational resources of the above devices, second, because during such a calculation, the scan time of the program is significantly stretched. The growth of the program scan is due to the fact that, as a result of the word or byte organization of the battery of the arithmetic logic unit, the resulting bit operations with words / bytes in it are performed much longer than the operations with words / bytes entirely. In some devices, bit shift operations are not supported at all, whereas the algorithm implies the execution of eight cycles with such operations.

In order to reduce the amount of computation and, as a result, scan time during CRC processing, a different algorithm is often used - a tabular one, when the table of masks is calculated and filled once in the first scan of the program. However, this method is not without drawback, because it also consumes resources. 512 bytes (or 256 double-byte words), sometimes, not at all superfluous.

Is it possible to modify the algorithm for calculating the CRC in such a way as to abandon the use of bitwise shifts and tables? Of course, yes. It is enough just to carefully look at the algorithm with a bitwise shift.

I recall its essence:
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1. modulo 2 is added to the next byte of the sending array with the low byte of the two-byte CRC;
2. the acyclic shift of the CRC is carried out by one bit from the high-order 15th bit to the low-order, zero bit, with the low-order bit being raised, and the high-order bit is reset;
3. if the value of the extended bit is one, then the CRC modulo 2 is added with the polynomial 16 # A001.
4. Steps 2 and 3 are repeated 7 more times.

Why is this implemented so and not otherwise? Yes, because such algorithmization seemed to be the most suitable for implementation through hardware logic.

Carefully looking at this algorithm, it is easy to find that we are actually dealing with a cyclic bit-wise word shift. The high bit of a polynomial is responsible for its cyclicality. As a result, the value of the high bit CRC after each shift is identical to the value of the advanced low. Thus, when performing a cyclic bitwise shift, a polynomial with which then it is necessary to perform addition modulo 2 is transformed into 16 # 2001.

There are eight such shifts ... Simply speaking, globally, we are talking about swapping the low byte of the CRC with its high byte. And this suggests that, after adding the next byte of the next byte of the sending array with the low byte of the CRC, it is enough to swap the low byte and the high byte of the CRC, and then, after successively analyzing the eight bits of its high byte, starting with its lowest bit, the eighth, add the modulo-2 RC with known constants, predetermined by the value of the polynomial, the value of which for Modbus CRC16, as already indicated above, is equivalent to 16 # 2001.

The final algorithm for accounting in the CRC of the next byte of the sending array is as follows:

The modulo 2 addition is carried out of the next byte of the sending array with the low byte of the two-byte CRC, after which the low and high byte of the CRC are swapped;

1. If the value of the 8th bit of the CRC is one, then its addition modulo 2 is performed with the constant 16 # 0240;
2. If the value of the 9th bit of the CRC is one, it is added modulo 2 with the constant 16 # 0480;
3. If the value of the 10th bit of the CRC is one, it is added modulo 2 with the constant 16 # 0900;
4. If the value of the 11th bit of the CRC is one, it is added modulo 2 with the constant 16 # 1200;
5. If the value of the 12th bit of the RCS is one, then its addition modulo 2 is performed with the constant 16 # 2400;
6. If the value of the 13th bit of the RCS is one, it is added modulo 2 with the constant 16 # 4800;
7. If the value of the 14th bit of the CRC is one, then its addition modulo 2 is performed with the constant 16 # 9000;
8. If the value of the 15th bit of the CRC is one, then its addition modulo 2 with the constant 16 # 2001 is performed, the calculation is completed.

The advantages of this method of calculation:

1) Compared with the bit shift algorithm:

a) the proposed algorithm allows one to get rid of FOR-NEXT nested loop commands and bit-shift commands in such a cycle; moreover, the number of the number of addition commands executed modulo 2 is kept unchanged;

b) in controllers with the support of the SWAP command, the eightfold bit-shift CRC shift is replaced by a single command, and in controllers that do not support such a command, by one or two transfer commands that are among the basic controller commands and take the minimum time;

2) Compared with the tabular method of calculation, this method does not need to allocate space in the data memory for the table, in its preliminary filling, in the selection of the corresponding mask from the table and its subsequent imposition on the CRC byte.

The development of the proposed algorithm for calculating the CRC16 was originally conducted for Mitsubishi PLCs of the FX3S / 3G models that do not support the CRC calculation instructions and swapping bytes in the word, while the total total time for calculating the CRC using the specified algorithm for the 128 byte package does not exceed 2.4ms