📜 ⬆️ ⬇️

Answer L.P. Plekhanov comments on the book "Fundamentals of self-timed electronic circuits"

Preface: My name is Victor, and I am an employee of the Institute of Informatics Problems of the Russian Academy of Sciences. Two developments are underway in our department: a recurrent processor and a self-timed circuit design. I myself am busy first, but could not pass by My remarks on the book of L.P. Plekhanov "Fundamentals of self-timed electronic circuits" , because L.P. Plekhanov works with us and this subject and the "internal kitchen" are close and familiar to me. I asked Leonid Petrovich to prepare an answer, which I will publish with pleasure today.

For reference : The team in which Plekhanov L.P. quite a lot of developments in terms of self-timed circuitry. More than 20 patents on self-sync, including international patents (US).

Also, the solutions are not only theoretical, but also practical. For example, the book “Library of Functional Cells for Designing Self-Timed Semi-Custom Chips of the 5503 and 5507 Series” was just recently published. CAD "Ark" allows you to design self-timed circuits in the basis of the BMC series 5503 and 5507.
')
In addition, a self-synchronous divider and an FMA block for the COMDIV-64 processor are already made using the 65 nm technology. Due to various circumstances, these works do not yet have publicity deserved in my opinion, and therefore I personally hope that this first post of our department of the IPI RAS will not be the last and in the near future we will tell the public about self-synchronous circuitry in more detail. In the meantime, I give the floor to Leonid Petrovich.

Poshumim!



In fact, if a competent review appears, then this is good for the author. But here is another case.

1. Overall impression


The author of the comments (hereinafter referred to as the Reviewer), being in captivity of his own event views, unswervingly believes that all others proceed (or should proceed) from the same.

And why on earth?

Therefore, the Reviewer did not understand anything in the book - neither the idea, nor the approach, nor the results.
But the comments are written with great self-confidence.

2. Let me remind you


The event is the switching of the signal - the output of an element from 0 to 1 and from 1 to 0. In the event-based approach, all these switchings should be described when the circuit is working. It is clear that the larger and more complex the scheme, the greater the switching. That is, an event-based approach does not allow dealing with large circuits - except for up to 10-20 elements. Then there are thousands, hundreds of thousands, etc. switching.

This is the main drawback of event methods. Another, less obvious, but no less important, is the closure of all event diagrams. Without it, nothing can be done. In the functional approach, the elements are initially described by logical functions output from inputs of the form Y = F (Xi) and not the other way. There are no event descriptions in it. This is the novelty of the functional approach, which allowed us to consider our schemes differently than before and get new results.

The meaning of the functional approach:

a) Refuse the event description.
b) When drawing up (designing) a circuit, consider open circuits. That is, to close the circuit at the very final stage of its use.
c) Design hierarchically.
This is written in the preface. In the analysis and synthesis of no event descriptions. How could you not notice this in the book - I do not understand. It was possible to put an end here, since it is pointless to discuss something with different approaches.

But a number of some general statements should still be answered.

3. About terminology


Quote:
"But the definition of a self-timed circuit:
A self-timed circuit (CC scheme) is a circuit that has
two properties of error free operation:
no races for any finite element delays;
failsafe.
This definition implies a hypothesis about Muller's delays.
The second point is a consequence of the first. And the first point is nothing but the definition
long-established term speed-independent (SI).
That is, it turns out that self-timed circuits are not a separate class of circuits,
and the circuits synthesized by a certain method, which guarantees the property SI.
Thus, “self-timed” is not a characteristic of a class of circuits
and a characteristic of the method of synthesis. "
Yes, there is an established SI term that appeared more than 50 years ago. But he is incomprehensible: what speed are we talking about? Perhaps that is why the term “self-timed” was introduced by V.I. Varshavsky, as more understandable: the scheme synchronizes itself.

It is essentially equivalent to SI. I concretized the definition in order to further develop the functional approach. This is the usual way, for example, in mathematics: I defined it and built a theory on it (remember Lobachevsky).

Any author has the inalienable right to introduce his definitions and build his designs on them. For example, Muller introduced the definition of a semimodular scheme. Now "fail-safe" is a term from GOST. It means that the circuit stops (stops working) immediately after the appearance of a certain failure, for example, the element burned out. Both properties in the circuit are provided in different ways: the first is the discipline of changing the inputs of the elements in the two phases of work, the second is the indication of signals. So the “second point” is NOT a consequence of the first. The schemes discussed are asynchronous. And their belonging to the varieties of this class is a formal question, I do not think it is important here to break spears.

Interestingly, for a developer of practical schemes (or a practical developer of schemes), it is closer and clearer: are those two properties mentioned or semimodularity necessary in the event approach? The developer decides.

4. About problems of the event description


In the book it is not used, but still.

Quote:
“It is obvious that there are two such problems: an unlimited basis for the implementation of logical
elements and the exponential complexity of computing logical functions. ”
An unlimited implementation basis is not a problem, but a working tool. The limited basis of 2I-NOT, 2ILE-NOT, to which the Rezentrant calls for, is not used anywhere (except for theory) because of the maximum costs in transistors. Otherwise, why there are extensive basic libraries of 200, 300 and more elements, you could have only two of them.

Quote:
“It’s such horrible things.”
image
"
Such elements have not terrified anyone for a long time, and this is complete in the base libraries.

And the exponential complexity of the event-based approach is yes, a problem that cannot be avoided is not saved by change diagrams, neither Petri nor STG. And this is not the “complexity of calculating logical functions”, of which there is none, but the cumbersome presentation of events — signal switching. This cumbersome and generates a huge amount of necessary computer calculations. In addition, the mandatory closure of all event diagrams with the involvement of
external environment, accounting for which - extra weight.

Usually, in the event-based approach, the process (! And not functions) of switching for one initial state is described. And where are all the other states that must be passed to guarantee semi-modularity?

Quote:
"As you know, logical functions are calculated from truth tables using Carnot maps, cubes, and the like."
It would be necessary to open a big secret to the Reviewer: there is a so-called. Boolean algebra, by which functions can also be calculated.

Quote about event description:
“Hence the difficulty with the hierarchical description. I would call it ancient ridiculous prejudices. They appear to have been taken from the works of the 30-year-old Warsaw
limitation. And without any understanding. "
What are prejudices? Is there no difficulty? Try to create an event description of at least a 4-bit ALU or counter, not to mention 8, 16, etc. discharges, with the passage of all states and the external environment. What is a hierarchical event description? If it is, then let me correct. In addition, such a dismissive attitude to the works of V.I. Varshavsky with a group is indecent - it is indecent to not know these works.

If Muller proved the existence of the schemes under discussion and gave an analysis method, then V.I. Varshavsky and the group developed methods for creating them, including the method of change diagrams used by the Reviewer (see the following quotation). The mere fact that they have 150 inventions should be respected. However, all this is in the book.

Quote:
"In addition, the functional approach is secondary to
event approach. A functional description is nothing but
as a result of applying Muller’s method to an event description.
Indeed, according to the change diagram, we obtain a truth table;
we calculate logical functions. As a result, we obtain a functional description.
In fact, it turns out that the self-timed method is a superstructure
over Muller's method. "
This is a set of reviewer's misconceptions — again an event championship. What is the “Muller method” as applied to the event description? Muller examines the behavior of the circuits in the event description (transition diagrams) and identifies conflicting transitions that violate semi-modularity. This is pure ANALYSIS.

Further, synthesis according to change diagrams was developed by V.I. Varshavsky with a group as a method of synthesis. What does the method of Muller's analysis? And where does the secondary, the superstructure and in general all the statements in that quotation? See clause 2 of the answer.

Quote:
“A scheme without a description of the discipline of changes in input signals has no meaning.”
Namely, this discipline is spelled out in detail in the book.

Quote:
“In the end, the author is forced to introduce purely eventual concepts:
Initiator and Continuator (for signals). ”
Here is a mistake. These are structural concepts. Continuator structurally through other
elements follow the initiator.

5. Self-timing analysis


The reviewer does not see one of the main problems of designing self-timed (or, what is the same, SI) circuits - analysis.

The developer of such schemes (practices) does this:
- collects a fragment of the scheme,
- analyzes for self-timing / semi-modularity,
- from the correct fragments collects the scheme at the next level,
- analyzes again, etc.

That is, analysis is a working tool for designing practical schemes. And event synthesis by change diagrams, Petri and STG is the lot of small circuits - up to 10-20 elements. Next - the exhibitor. In our practice, for specific fragments, event analysis lasted 4 days and 7 days, and this is not the limit. And only for one initial state, but not for
all as it should!

The functional approach, as described in the book, radically solves the problem: the analysis of all states of any hierarchy depth, it was really up to 8-10, lasts a few seconds or minutes.

6. Judging by the comments, the Reviewer sees no problems in the event descriptions. I would venture to suggest that he did not develop sufficiently large circuits and did not encounter their problems. And all the problems - in large schemes.

7. A small link


One of the Synthesized Reviewer schemes on the site - the C-element in a two-input basis - is presented in the classic book of 30 years old by V.I. Varshavsky / Ed. “Automatic control of asynchronous processes in computers and discrete systems”, 1986, in fig. 5.27.
It would be nice for scientific ethics to refer to the classic predecessor.

L.P.Plekhanov

Source: https://habr.com/ru/post/349580/


All Articles