
Xilinx has quietly and without unnecessary pomp announced a product that can completely change the look and development process of modern radios and transmitters. This is a small chip that combines 90% of the processing and generation of radio signals:
- programmable logic (FPGA),
- processors for signal processing and user applications (two ARMs),
- up to eight 12-bit ADCs with a sampling frequency of up to 4 GHz (!)
- up to eight 14-bit DACs with upper frequencies up to 6.4 GHz (!).
It seems we are entering an era when the architecture of the transceiver becomes as versatile as the architecture of a modern PC. Make SW, not HW!
Era before zynq'a
A bit of history. I am a representative of a small team, whose main activity during the last 10-15 years is R & D in the field of satellite navigation.
What have we done during this time! We developed new signals for GLONASS, processed all possible signals, simulated navigation system signals, made systems for detecting jammers, made chips for antenna arrays, made receivers the size of televisions for quantum-optical stations. In general, according to our adventures, you can safely write the Kama Sutra of signal processing (which we
did )!
')
It is clear that with such a zoo of tasks we can’t do with standard receivers. We love and know the Geos and NV-08C modules, we even participated in these projects, but for our projects we always used our own developments.
The only way to make a small-batch receiver is to base on FPGA. It is worth explaining here that the processing of modern signals resembles the work of computer graphics. The operations are relatively simple, but they need to be done a lot in parallel. In this sense, FPGA (or a piece of silicon in a large series) for the receiver as a GPU for a modern computer.
What did the structure of the receiver look like ten years ago?

What is wrong with this scheme? The processor and programmable logic are spaced apart in different chips. And this creates a lot of problems.
The specifics of signal processing requires constant data exchange between the processor and the FPGA in a strict real time mode! Navigation receiver streams reach several gigabits.
Each microcircuit requires its strapping, cooling, a multilayer board for connecting and corny takes place on the printed circuit board.
And in the end, it's just hard. And the difficulty in building systems is almost synonymous with failure.
For example, the receiver’s block diagram, which we did in 2007:

Xilinx Spartan 3 was used as the FPGA, and a hefty PowerPC in the form of the MPC8245 was used as the processor. A lot of time was spent on transferring toolchains, searching for drivers, organizing exchanges between the FPGA and the processor, etc.
But suddenly the world has changed ...
The emergence of SoC, combining programmable logic and processor system
The pain described above is typical for small-scale production and prototyping. For a bundle, a separate FPGA + separate CPU is characterized by high cost, wild consumption and size. And what's even worse, the software part of the product was intolerable. For each new combination, we had to rewrite most of the software.
As soon as the product could discourage ASIC production, the manufacturer developed its own microchip. In this chip all digital processing was integrated: ADC to intermediate frequency, parallel digital processing logic, processor, interfaces. According to this scheme, all modern navigation chips are built.
In the early 2010s, Xilinx and Altera announced products that solved half of our problems. The company Xilinx began to produce a series of chips Zynq, combining programmable logic (FPGA) and processor system (dual-core ARM with a full set of peripherals).

The system on a Zynq crystal was a huge step forward. The code has been significantly simplified, the exchange rate between the processor system and the programmable logic has risen, and the PCB has been simplified. For example, the structural diagram of one of our projects in 2013, feel the difference:
And most importantly, a new quality was unexpectedly born: now our software was launched on any motherboard with Zynq.
In the development cycle of a radio engineering device, the writing of algorithms and software, the accompanying research, development, occupy 80% of the time. If Java is a cross-platform, then Zynq is a cross-board. Now we can shift the development of the board to the customer, and focus on the main thing - the software.
In addition, Xilinx took over the issues of toolchains, drivers, and other problems that are far from radio engineering.
Five years after the launch of Zynq, an interesting phenomenon appeared - commercial products based on programmable logic. An example would be
Piksi Multi or
Tersus Precise . Yes, these receivers still consume more than similar ones built on ASIC. But the price has become comparable! A small Zynq with a small amount of programmable logic can now be bought for $ 50! And this increases the number of possible applications by orders of magnitude!
Coming day ...
If we take into account the above, it becomes logical that the next step is to add ADCs and DACs to the crystal. But Xilinx decided to take two steps forward at once.
Here a little more. Modern receivers or transmitters are two worlds. Digital and analog. For example, consider a receiver.
Analog world:
- An antenna that converts an electromagnetic field into an electrical signal;
- The frontend, whose function is to filter, amplify and lower the carrier frequency of the signal, so that it is pulled by digital processing.
The junction between
hell and paradise analog and digital world - ADC.
Next comes the digital world, implemented by a type of computer.
Xilinx swung at the analog world!
An ADC with an upper frequency of 4 GHz will allow you to switch to digital processing immediately on the carrier! DACs with an upper frequency of up to 6 GHz - throw out all the links to the power amplifier.
And such ADCs and DACs - 8 pieces each! This closes issues with multi-antenna systems that are becoming more and more relevant every year: MIMO, CRPA, Beamforming, orientation determination, etc.
Analog-to-digital converters are implemented on a single chip, which promises a high identity of their characteristics. However, they have a high dynamic range - about 65 dB SFDR.
Thus, the analog part of the receiver is reduced to the antenna, pre-filters, preamplifier. In the transmitter - to the power amplifier and antenna. And one stage of heterodyning, if your operating frequencies are higher than those indicated.
According to Xilinx, the use of RFSoC can significantly improve energy consumption. In the version with 8 ADC and 8 DAC, the power consumption is indicated at 27 W.
As in the Zynq UltraScale series, the processor system is represented by two processors - for radio operators (dual-core Cortex-R5) and for user applications (quad-core Cortex-A53).
Summary
The announcement of Xilinx reflects the general trend in radio engineering - a course towards unification and all-in-one solutions. Personally, it reminds me of the development of computers in the XX century. What consequences for the industry brought the appearance of the same type of PC, what happened to the profession of a programmer and how the world has changed - no need to be reminded.
The main question now is, will they sell us this miracle? It remains to hope for a civilian version for adequate money.