Implementing HQoS on Juniper MX80 / MX104 fixed ports
Widely known news in narrow circles was the appearance in Junos 16.1 of the release mechanism of extended queue on fixed 10G ports of the MX80 / MX104 platforms.
As it sometimes happens, technical documentation on new features comes out with some delay, even now sections devoted to this topic leave a feeling of understatement. Fortunately, colleagues from the Juniper Moscow office at the Juniper Networks Summit conference helped find the answers, for which they thank you very much.
The QX chip of the first generation Trio chip (namely, these platforms are built on it) is distributed among interfaces on modular cards in a non-trivial way, which means that the density of subscribers, stated by the manufacturer, per chassis can only be obtained under certain conditions.
The QX chip's buffer memory is divided between two scheduler blocks, each capable of servicing 32,000 queues. In turn, each scheduler works with two groups of interfaces on different modular maps, making available to each group no more than half of their queues.
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In the case when there is only one modular card in the chassis, each scheduler unit works with a separate group of ports on this card in exclusive mode, thereby increasing the number of available queues.
In the case of fixed ports, the situation is somewhat different - the ports are divided into pairs (0, 2) and (1, 3), and each pair of ports works with one of two schedulers. Those. each pair of ports is capable of serving no more than 32,000 queues.
From here follows a few simple rules for achieving the stated subscriber density per chassis:
As it sometimes happens, technical documentation on new features comes out with some delay, even now sections devoted to this topic leave a feeling of understatement. Fortunately, colleagues from the Juniper Moscow office at the Juniper Networks Summit conference helped find the answers, for which they thank you very much.
The QX chip of the first generation Trio chip (namely, these platforms are built on it) is distributed among interfaces on modular cards in a non-trivial way, which means that the density of subscribers, stated by the manufacturer, per chassis can only be obtained under certain conditions.
The QX chip's buffer memory is divided between two scheduler blocks, each capable of servicing 32,000 queues. In turn, each scheduler works with two groups of interfaces on different modular maps, making available to each group no more than half of their queues.
')
In the case when there is only one modular card in the chassis, each scheduler unit works with a separate group of ports on this card in exclusive mode, thereby increasing the number of available queues.
In the case of fixed ports, the situation is somewhat different - the ports are divided into pairs (0, 2) and (1, 3), and each pair of ports works with one of two schedulers. Those. each pair of ports is capable of serving no more than 32,000 queues.
From here follows a few simple rules for achieving the stated subscriber density per chassis:
- if you land subscribers on two modular cards - divide them by cards and by groups of ports on the card;
- if there is one modular card in the chassis - divide subscribers into groups of ports;
- if you land subscribers on fixed ports - divide them into groups of ports.
Source: https://habr.com/ru/post/323262/
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