In the last
publication I mentioned that my SBC for experiments fell to the death of the brave. By itself, the problem of a new test subject arose.
I somehow did not want to buy a simple monoplatnik, so my choice fell on SoC'i. I chose between Zynq and Cyclone V. By the name of the topic, I think, I guessed what I decided to choose.

')
This publication will consist of a small overview of the scarves from the title image and how to “program” and “configure” similar hardware. To whom it is interesting to ask under the cat.
Board
I purchased a
Z-turn Board from
Myir . On it is a stone Zynq 7020, 85k logic cells, 2 core Cortex-A9, 1 GB DDR3. Interfaces displayed on the board: JTAG, HDMI, micro SD host, Ethernet, UART, USB OTG and ~ 100 GPIO pins. From the periphery there are LED, RGB LED, buzzer, inertial and temperature sensors.
More detailed description can look at the
link .
I note that if you are going to use such a stone, you must purchase a radiator for it and racks for the corresponding board. And if this is not enough, then screw the fan there as well, since This beast is heated very much.
Programming
Actually, Zynq can be programmed in two ways: 1) as an ordinary MCU baremetal 2) from under the OS.
Baremetal
In this case, everything is extremely simple: throw in a program ---> compile ---> fill JTAG into stone. This stone has 256 KB of flash for firmware. Since I did not acquire the JTAG debugger, there is nothing to show here =)
OS
In my case on a micro SD card, the Linux build. Those. the way to create, check and debug programs is similar to that described in the last publication.
Elementaryarities: throw in a program ---> compile with a toolchain and copy to the board / compile on the board / copy the script to the board ---> debug / run ---> have a profit!
I think it’s not really necessary to focus on this, so just << Hello Zynq! >>:
bash>$ touch hellozynq.py bash>$ echo '#!/bin/python > print "Hello Zynq!" > ' > hellozynq.py bash>$ cat hellozynq.py
Copy our file on the board:
bash>$ scp hellozynq.py root@<ip_address>:/root/hellozynq.py root@<ip_address>'s password: hellozynq.py 100% 35 0.0KB/s 00:00
Run:
root@localhost:~
Configuration
And here we will focus attention. The way to configure the FPGA part of this SoC'a is roughly as follows:
- Creating a project in Xilinx IDE
- Configuration Development
- Generate bitstream
- Firmware
Creating a project in the IDE company Xilinx and the development of the program itself will take on the article. Therefore, I will take the finished project, which went along with the board.
First run the project. Then we run the synthesis and implementation. After we generate bitstream file.
Copy it on the board:
bash>$ scp another_blink.bit root@192.168.100.9:/root/ablink.bit root@192.168.100.9's password: hw.bit 100% 3951KB 3.9MB/s 00:00
Check the directory:
root@localhost:~
And configure the FPGA:
root@localhost:~
Hurray comrades! LED is on!
Notes :
Configure FPGA, of course, can be a debugger. Only I do not have it. Vivado is very powerful and requires a lot of memory and CPU resources. On my i5 and 4GB of RAM, it constantly swaps.
You also need to be attentive to the developer, because I heard a few stories about how the stones were burned by incorrectly tuning the output of the FPGA. Perhaps this is not valid for Zynq.
PS :
I decided to take this shawl because
It is the cheapest and most accessible to me FPGAs because it is possible to synthesize any digital interfaces, make multiplexers of the outputs and, the coolest, synthesize calculators (automata, processors, coprocessors like FPU, etc.). And in conjunction with Linux on the processor, you can create the coolest things.