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A fistful of relays. Part 3 - command decoder and control machine

My collection of old computers is not replenished very quickly, so I am doing an old computer with my own hands .

It works completely on electromagnetic relays and will consist of four blocks.
To date, I have already completed three of them: the ALU, the register file and the control module, which decodes the instructions, distributes the remaining blocks with instructions on what to do.

Warm lamp clicking sound of a clock generator:
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Architecture


At first I thought about the Harvard architecture for the computer, but then I decided that it would be more convenient to enter the data from the same ROM as the program. Therefore, now I will have an 8-bit address bus and a 16-bit data bus. All 16 bits are used to read the instruction code and to transfer two operands to the ALU. The data is read into the register via the lower 8 bits of this bus.

All instructions have the same width, so their reading turned out quite simple - just click on what came through the data bus. At the same time, the same relays partially perform the functions of decoding instructions, because each of them has 4 switches.



As a result, only 46 relays are involved in loading, storing and decoding the instruction code, which is less than the HPRC , which I used as a sample.

Each instruction is executed in 10 cycles. So much is needed because the relays cannot be triggered on the signal front as microchips with several parallel inputs. It is necessary to allocate a whole tact for snapping the result, for example. Some teams need 1-2 clocks less, but I did not complicate the scheme, so these 10 clocks always run over:



Command system


Processor commands are similar to ARM - the result of the calculations can be placed in any register. For example, such an insane operation as XOR PC, A, B is possible. When calling a function, the return address is put in the L (link register) register. Memory access only with the help of separate loading instructions (but there is still no memory yet).

But, unlike ARM, the width of the instruction code is much larger than the width of the registers. Due to this, all downloads of constants, addresses, and transitions are encoded by one instruction.

There are conditional execution flags for transitions - you can check the sign of the result of calculations, equality to zero and overflow. The instructions MOV, CALL and JUMP are encoded almost the same, and they do almost the same thing. JUMP is just transferring the value to the PC. Therefore, there is a nice side effect - the conditional execution feature also works for MOV. Those. you can execute (or not execute) MOV NZ, A, 255.

In addition to downloads and shipments, the control module can connect registers to the ALU and receive the result from it. ALU makes addition, subtraction, OR, XOR, AND, NOT, different shifts by 1 bit. And in the instructions of the ALU there is a flag that disables the recording of the result. That is, the command works as CMP or TEST on x86, but you can choose any operation. For example, check the flags as if OR was executed, but do not spoil any registers.

And now let's try to take off with all this.


Now the computer has no memory other than registers, so the instruction to be executed can be typed using toggle switches. But then he can do it to infinity:



Two clock speeds are supported. A slower mode is needed to monitor what is happening inside the computer:



No debugger is needed - the dump of registers is read by just eyes:



What then?


Then it remains to implement the storage devices. The housing for the module is now ready, where they will be located, so that soon it will be possible to launch the program from several instructions at once.



» Project page on github
» The first part of the description
» The second part of the description

Source: https://habr.com/ru/post/318500/


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