Hardware invades software at Moscow SECR conference
Traditionally, the CEE-SECR Moscow Conference (Central & Eastern European Software Engineering Conference in Russia) was about software, but this year the organizers decided to experiment and let in the dark demons of the hardware. And not from something like the national Arduino type, but from the levels that are more serious: micro-microprocessor microarchitectures, prototyping systems on a chip using FPGA / FPGA chips, and automatic generation of tests for processors during their development. To bind this material to something familiar to programmers, in the hardware topic, applications of embedded processors for the Internet of things, connection of licensed microprocessor cores with Russian microprocessor projects, training for a hardware device in Russian universities, as well as Russian embedded operating systems for those applications, where you can not let the long nose of the US State Department.
It can be said that the hardware theme on SECR was a success: the whole combination of reports was balanced and covered the theme from different sides; there were not so many people in the hall, but above average; Interesting disputes arose about the merits and demerits of open processor cores versus partially open, but more widely used in industry.
Then came Anton Pavlov , an employee of NIISI (an institute designed by the Russian microprocessor COMDIV-64). Anton Pavlov criticized the MIPSfpga platform for insufficient openness and proposed alternatives in the form of open cores with the MIPS32 Release 1. Architecture. Yuri Panchul stated that open cores are great and that any student of a microarchitecture or verilogue must construct their own simple conveyor core in order to understand concepts of pipeline and bypass delays, but (!) then (!) the student should work with the industrial core, which was used to create chips of dozens of companies (MIPSfpga with its core MIPS microAptiv UP such requirement) ovletvoryaet - MIPS microAptiv UP used Samsung, Microchip Technology, and many others).
Then Alexander Kamkin from the Institute for System Programming of the RAS told about his project Automated development of test program generators for microprocessors using the example of MIPS with a generator constrained random tests. At the same time, he quickly flipped through the slide about future measurement plans for test coverage (without this, it is difficult to evaluate the effectiveness of random testing with limitations):
Then Pavel Boyko from AstroSoft spoke about the Russian RTOS MAKS, which differs from FreeRTOS and µC / OS by Russianness, i.e. it can be certified for projects in which one of dozens of foreign RTOS systems is incorrectly used: