In the video - the developer of one of the blocks inside the Russian microprocessor Baikal-T
Now you will see something exclusive. The girl on the right of the video is the developer of one of the blocks inside the load-store unit of the MIPS P5600 microprocessor core, which is part of a system on a chip of the Russian Baikal-T microprocessor , which is used in the Katusha office printer, the Tavolga terminal, and the CNC machine control system Resource-30 , industrial controller for gas industry Aksitech KAM 300 and other devices.
And two men on video come to Moscow, St. Petersburg and Kiev for a series of seminars describing all stages of design and production of microcircuits: creating a specification, describing digital logic in the languages ​​of the description of the Verilog and VHDL equipment at the level of register transmissions, logical synthesis, placement and tracing , the creation of photomasks and the production of microcircuits in the factory. Among the organizers: RUSNANO, ENANO, Imagination Technologies (a company known as a GPU developer inside the Apple iPhone), MISiS, Moscow State University, MIPT, MIET, ITMO, Kazakh NTU, Kiev KPI and Kiev KNU. Seminar participants will get acquainted with real cases of Russian companies using CAD tools: LLC LABSISTEMS, JSC NIIMA Progress, JSC RPC ELVIS and JSC BAIKAL ELECTRONICS. Details - http://edunano.ru/doc/6335690702352234538 and https://habrahabr.ru/post/311562 .
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Under the cut are pictures showing what kind of unit a girl named Smriti Oja is designing, as well as (for the first time!) Part of Charles Danchek’s slides (this is the lecturer on the left), translated into Russian by Alexander Barabanov, associate professor of the Kiev Shevchenko University:
First, the blocks in Baikal-T. Here is a system on a chip of the Russian microprocessor Baikal-T. See on it two lilac squares and L2 cache under them? This is the MIPS P5600 dual-core cluster:
But the multicore cluster is larger:
But the insides of a single core. See the “Memory Pipe” label? Here is the development of a part of this block and the girl on the right of the video is busy:
Now a clipping from the Russian translation of the slide of the comrade on the left, Charles Danchek, lecturer at the University of California Santa Cruz Extension in Silicon Valley . On these slides you can understand what the engineers of Baikal Electronics in Moscow are doing:
Want to see more about it and listen? Sign up for seminars.
Full announcement of all the seminars in Moscow, St. Petersburg, Kiev and Alma-Ata - see "Chip from different sides: seminars Nanometer ASIC, MIPSfpga and Connected MCU in Russia, Ukraine and Kazakhstan . "
And the announcement of the seminar with the largest capacity in MISiS - on the website of RUSNANO / FIEP / eNANO :
And two men on video come to Moscow, St. Petersburg and Kiev for a series of seminars describing all stages of design and production of microcircuits: creating a specification, describing digital logic in the languages ​​of the description of the Verilog and VHDL equipment at the level of register transmissions, logical synthesis, placement and tracing , the creation of photomasks and the production of microcircuits in the factory. Among the organizers: RUSNANO, ENANO, Imagination Technologies (a company known as a GPU developer inside the Apple iPhone), MISiS, Moscow State University, MIPT, MIET, ITMO, Kazakh NTU, Kiev KPI and Kiev KNU. Seminar participants will get acquainted with real cases of Russian companies using CAD tools: LLC LABSISTEMS, JSC NIIMA Progress, JSC RPC ELVIS and JSC BAIKAL ELECTRONICS. Details - http://edunano.ru/doc/6335690702352234538 and https://habrahabr.ru/post/311562 .
')
Under the cut are pictures showing what kind of unit a girl named Smriti Oja is designing, as well as (for the first time!) Part of Charles Danchek’s slides (this is the lecturer on the left), translated into Russian by Alexander Barabanov, associate professor of the Kiev Shevchenko University:
First, the blocks in Baikal-T. Here is a system on a chip of the Russian microprocessor Baikal-T. See on it two lilac squares and L2 cache under them? This is the MIPS P5600 dual-core cluster:
But the multicore cluster is larger:
But the insides of a single core. See the “Memory Pipe” label? Here is the development of a part of this block and the girl on the right of the video is busy:
Now a clipping from the Russian translation of the slide of the comrade on the left, Charles Danchek, lecturer at the University of California Santa Cruz Extension in Silicon Valley . On these slides you can understand what the engineers of Baikal Electronics in Moscow are doing:
Want to see more about it and listen? Sign up for seminars.
Full announcement of all the seminars in Moscow, St. Petersburg, Kiev and Alma-Ata - see "Chip from different sides: seminars Nanometer ASIC, MIPSfpga and Connected MCU in Russia, Ukraine and Kazakhstan . "
And the announcement of the seminar with the largest capacity in MISiS - on the website of RUSNANO / FIEP / eNANO :
Source: https://habr.com/ru/post/311662/
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