Servers based on Intel Xeon E3v5 processors

We are glad to inform you that in our data centers, dedicated servers of new configurations based on Intel Xeon E3 v5 Skylake processors are available for order. Following the established tradition, Intel runs the latest server processor architecture on the “younger” E3. In this article we will describe in detail about the new processors, their technical characteristics and capabilities.

New processors: basic specifications

For our servers, we chose the most optimal, in our opinion, processor models: Intel Xeon E3-1230 v5 and Intel Xeon E3-1270 v5. Their main characteristics are presented below.

Characteristic	Intel Xeon E3-1230 v5	Intel Xeon E3-1270 v5
Technological process	14 nm	14 nm
Microarchitecture	Skylake	Skylake
Socket	1151	1151
Memory	Dual channel DDR4 / DDR3L, ECC support	Dual channel DDR4 / DDR3L, ECC support
Kernels / Threads	4/8	4/8
L3 cache	8 MB	8 MB
Base frequency	3.4 GHz	3.6 GHz
Maximum Turbo Frequency (1 core)	3.8 GHz	4 GHz
TDP (thermal design power)	80 W	80 W

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Skylake microarchitecture: major innovations

The standard set of Skylake processor components consists of two or four processing cores (CPUs), a graphics subsystem (optional), a common ring communication bus, a PCH platform controller unit on a multi-channel DMI / OPI bus, a PCI Express x16 bus, and an integrated module of System units Agent.


Illustration: Intel

Skylake microarchitecture-based processors correspond to the “tick” stage (Intel “tick-tock”). They are produced on the same technological process as the processors of the previous generation - Broadwell. At the same time, the micro-architecture has undergone significant changes. Among the most important innovations, first of all, the following should be highlighted:

1. New processors support both DDR3 (L) and DDR4 memory. If the Broadwell processors supported up to 32 GB of RAM, in Intel Xeon Skylake this figure is doubled - to 64 GB.
2. Improved specific performance per watt.
3. Improved ring architecture; at the same level of energy consumption, the ring bus capacity is doubled.
4. Due to the deepening of internal buffers, branch prediction blocks were improved and the window for extraordinary execution of instructions was increased.
5. Improved pre-sampling mechanism, which in turn has improved energy efficiency.
6. L3 cache size was increased from 1.5 to 2 MB per core.
7. The speed of the DMI bus used to connect the processor to PCH increased from 2 to 4 Gb / s, or up to 8 gigatransactions per second.
8. There is no power converter in the processors - now it has returned to the motherboards.
9. Intel SpeedStep technology has been replaced by Intel Speed ​​Shift technology, which provides the processor with more power management options and speeds out of the power saving mode.

In addition, new instruction sets have been added to the Skylake processors - SGX and MPX. We will tell about them in more detail below.

New security technology: SGX and MPX

Another major innovation of Intel Xeon E3v5 processors is the support of new security technologies implemented using the SGX and MPX instruction sets.

The abbreviation SGX stands for Software Guard Extensions (extensions for program protection). This instruction set allows you to create a safe zone in memory (in official documents of Intel, it is called an enclave - English enclave), which is inaccessible for internal and external attacks. Such a zone can be created for any application and store important data in it. Its contents will be completely closed for unauthorized copying or modification.
Adding the SGX instruction set allowed us to solve the following problems:

• Provide application developers with the ability to protect sensitive data from unauthorized access and from modification by malicious programs running with administrative privileges;
• protect sensitive data without affecting the operation of other applications and their consumption of system resources;
• give users greater control over the system and the freedom to install / remove any applications and services at their discretion;
• implement the ability to check the running code for reliability and security;
  develop using the usual tools of applications with a high level of reliability and confidentiality;
• Scale the performance of trusted applications simultaneously with an increase in processor performance;
• provide software vendors the opportunity to distribute applications and updates for them in a safe and secure way;
• Allow applications to allocate protected areas of code and data even in cases where an attacker has physical control over the platform and can attack its memory directly.

More information about the SGX instruction set can be found in this article .

The MPX instruction set (Memory Protection Extensions, memory protection extensions) is designed to protect against buffer overflow attacks. Whenever a pointer is dereferenced while executing a program, special instructions ensure that the program does not go beyond the range of the memory allocated for this particular pointer.
MPX support is already implemented in Windows (starting with Windows 8.1) and Linux (starting with kernel version 3.19).

Performance comparison

Here are the Sysbench test results for Intel Xeon E3 1230v5 processors (the lower the number, the better the result):

CPU	cpu, sec	threads, sec	mutex, sec	memory, sec
Intel Xeon E3-1230 (4 cores 3.2GHz)	87.963	24.117	1.646	23.242
Intel Xeon E3-1230v5 (4 cores 3.4GHz)	68.9	9.65	1.26	16.25

As can be seen from the test results, the speed of the new generation of processors has increased significantly, while the cost and power consumption remained at the level of previous generations.

Available configurations

We offer the following server configurations based on Intel Xeon E3 v5:

CPU	Memory	Discs
Xeon E3-1230v5	32 GB DDR4	2 × 240 GB SATA
Xeon E5-1270v5	64 GB DDR4	2 × 480 GB SSD

New servers are already available for ordering in the data centers of St. Petersburg and Moscow. In the near future, it will be possible to build arbitrary configurations based on Intel Xeon E3 v5 processors.

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