How to start developing iron using FPGAs - step by step instructions
How to increase the number of Russian engineers who would be familiar with the development of hardware, and with the development of software, and could build systems in which part of the functionality is in a specialized hardware, and some in software, while maintaining a balance between them?
To do this, it is not necessary to throw away the awkward money a la Skolkov deal and MIT.
There is a mass of cheap and effective measures to upgrade the Russian educational system. One of them is to introduce widely practical FPGA / PPVM / FPGA classes among senior pupils and students. This is what engineers learn, who then develop microchips inside the Apple iPhone in Cupertino, California.
FPGA - Programmable Logic Integrated Circuit
FPGA - User Programmable Gate Array
FPGA - Field Programmable Gate Array
')
Since we are talking about boards below, many readers may immediately receive a response: “a, this is arduino / raspberry pi / robots — we know!” No, this is not arduino, it has nothing to do with this class of devices. I repeat once again: this is not arduino, because arduins have a microcontroller based on the microprocessor core, and there is no processor at all - a pure matrix of reprogrammable logic cells.
As long as American schoolchildren play only with microcontrollers, Russian schoolchildren can play simultaneously with microcontrollers and FPGAs, and thus gain technological advantage due to system thinking - understanding and programming, and the principles of developing hardware logic at the same time.
One of the problems of using FPGA for the education of Russian teenagers is the lack of literature in Russian. The Russian translation of the book Digital Design and Computer Architecture, Second Edition, by David Harris and Sarah Harris should be released soon, and this problem will be partially solved. But in addition to the literature describing circuit design and development of hardware at the Register Transfer Level (RTL) using Hardware Description Languages ​​(HDL), there is another problem - for a beginner, working with student cards is nontrivial, and the software environment for developing - unfriendly.
Therefore, I decided to show you step by step how to start working with one of the FPGA boards, which is convenient because it is stuck on a prototyping board and can be used by schoolchildren’s teachers like those who, since the 1970s, began introducing circuitry through small chips K155LA3 type integration (TTL 7400, CMOS 4000). The board stuck in the FPGA layout is a natural continuation of such courses.
This is how the basics of digital logic were taught from the beginning of the 1970s:
And this is what he can go to after acquainting schoolchildren with the basic concepts of a logic element, a trigger and a clock frequency signal. This is the same, but on the technology of the 2010s:
The fact is that inside the FPGA there is essentially a constructor of thousands of logic elements like the elements in K1553, but in the FPGA you can connect them not with your hands using wires, but by changing the contents of the special memory, bits that are connected to multiplexers that change the logical functions of FPGA cells and connections between them:
Where can I get the boards, the software for development and the necessary plug-ins, I will tell at the end, and now we dive directly into creating a simple scheme using the free Xilinx ISE WebPACK development environment:
Enter and create a new project:
It is important to choose a separate directory for the project and not to mix it with your source files, because the synthesizer generates many different temporary files and you can get confused in them (all of them can be deleted after use):
Enter the name of the project. This name is the same as the name of the main module on Verilog (iron description language):
Enter the FPGA parameters: Family, Device, Package, Speed. They need to be taken from the documentation on the board.
Project created by:
Add source files in the Verilog hardware description language.
The top.v file contains the schema description:
The cmods6.ucf file contains information for the development environment about how the logical inputs and outputs of the main module (btn_0, led_2, ...) are associated with the location (location, LOC) of the physical legs of the FPGA chip, called P8, N4, etc. . This file is a stripped-down version of the file for this board, downloaded from the Digilent website (motherboard manufacturer):
Now we will click on the button “generate a file for programming the FPGA”. There is an important point here - “programming” is not software-based software programming, which boils down to creating a sequence of commands for a certain processor. Programming File in this case is the content of the memory in the FPGA, which defines the logical functions and connections of the FPGA cells. The processor is not present in this scheme (although you can create a processor yourself by programming (in the above sense) FPGA cells).
Now press the button “look at the abstract (not tied to a specific FPGA) scheme described on the verilog and synthesized by software):
Top module:
Click on the mouse to look inside:
Click on the "Zoom to Full View" button to see the whole scheme:
And now let's take a look at the revised scheme generated by software for a specific FPGA (View Technology-Specific):
We see the word LUT - this is the Look-Up Table - you need to remember it for the future:
Now we’ll click on the “View / Edit Routed Design (FPGA Editor)” button to see how the diagram will fit into the FPGA cells:
Larger:
Click the button to configure the FPGA. The board is attached with a micro USB cable to the computer.
From this point on, it is important that the plug-in from Digilent is installed for this board - digilentinc.com/Products/Detail.cfm?NavPath=2 , 66,768 & Prod = DIGILENT-PLUGIN
Digilent also has a software called Digilent Adept, but for some reason it doesn’t work on my computer with this board, so it’s better to use the plugin and iMPACT. The sequence of actions below is not necessary to understand, it’s just “magic spells” to transfer the * .bit file to the configuration memory inside the FPGA:
Everything, now the board should work - respond to button presses and blink lights accordingly.
Now, let's not close iMPACT, go back to the ISE main window and build not a combinational, but a sequential circuit - a shift register. We use a low frequency clock signal generator 1 Hz, i.e. once a second. The board still has a clock signal generator at 8 MHz - this frequency can be raised to 200 MHz using a PLL. But the high frequency is of other designs, and for clarity, 1 Hz is what you need:
Synthesize it, generate a bit-file, go back to iMPACT and click on the Program button. It will say:
You need to click Yes and a new design will be loaded into the FPGA. By the way, theoretically repeated (after the creation of the iMPACT project) loading should occur simply by clicking Configure Target Device in the main ISE window, but really it does not happen for me - software tries to create a new iMPACT project. Therefore, it is better to use the Program button inside the iMPACT window. All complaints about this are in Digilent and Xilinx.
Appendix A. Two videos - how to implement a shift register and counter
Appendix B. Full header of the top module on the verification for this board
With all the links and comments:
Appendix C. Where to get fees
Xilinx FPGA boards can be borrowed on the Digilent website, now it's a National Instruments unit. Here is a Digilent Cmod S6 board that I used in a post, with the smallest Xilinx Spartan-6 FPGA:
For further training, there are for example Nexys 4 boards with more powerful Xilinx Artix-7 FPGAs. They do not need to twist the wires on the breadboard, since this stage of training has already passed:
About boards with Altera FPGA I will write another post.
Appendix D. Where to get the Xilinx ISE software
It can be downloaded directly from the Xilinx website. You can use the free version. But for Spartan-6, you need to use not the newest version of the Xilinx Vivado 2014.4 development environment, but the Xilinx ISE 14.7 of 2013. Why not Vivado? Marketers at Xilinx decided to transfer all users of Spartan chips to newer Artix FPGAs, and turned off support for Spartan from the new software. But Artix doesn’t have any boards that can be inserted into a prototyping board. Therefore, you need to use the 2013 version of the software:
But the Xilinx Vivado software which supports the Nexys 4 with the Xilinx Artix-7 in particular (it is not needed for the Spartan-6 card):
Now an important point. To upload a .bit file to the FPGA configuration memory on the board, you need to download a special plugin from the Digilent website:
The site still has Digilent Adept software, but I do not recommend it for Spartan-6, I had problems with it.
Appendix E. Some FPGA Parameters Labels
And finally, another photo of the FPGA board on a breadboard with buttons, resistors and a seven-segment indicator:
To do this, it is not necessary to throw away the awkward money a la Skolkov deal and MIT.
There is a mass of cheap and effective measures to upgrade the Russian educational system. One of them is to introduce widely practical FPGA / PPVM / FPGA classes among senior pupils and students. This is what engineers learn, who then develop microchips inside the Apple iPhone in Cupertino, California.
FPGA - Programmable Logic Integrated Circuit
FPGA - User Programmable Gate Array
FPGA - Field Programmable Gate Array
')
Since we are talking about boards below, many readers may immediately receive a response: “a, this is arduino / raspberry pi / robots — we know!” No, this is not arduino, it has nothing to do with this class of devices. I repeat once again: this is not arduino, because arduins have a microcontroller based on the microprocessor core, and there is no processor at all - a pure matrix of reprogrammable logic cells.As long as American schoolchildren play only with microcontrollers, Russian schoolchildren can play simultaneously with microcontrollers and FPGAs, and thus gain technological advantage due to system thinking - understanding and programming, and the principles of developing hardware logic at the same time.
One of the problems of using FPGA for the education of Russian teenagers is the lack of literature in Russian. The Russian translation of the book Digital Design and Computer Architecture, Second Edition, by David Harris and Sarah Harris should be released soon, and this problem will be partially solved. But in addition to the literature describing circuit design and development of hardware at the Register Transfer Level (RTL) using Hardware Description Languages ​​(HDL), there is another problem - for a beginner, working with student cards is nontrivial, and the software environment for developing - unfriendly.
Therefore, I decided to show you step by step how to start working with one of the FPGA boards, which is convenient because it is stuck on a prototyping board and can be used by schoolchildren’s teachers like those who, since the 1970s, began introducing circuitry through small chips K155LA3 type integration (TTL 7400, CMOS 4000). The board stuck in the FPGA layout is a natural continuation of such courses.
This is how the basics of digital logic were taught from the beginning of the 1970s:
And this is what he can go to after acquainting schoolchildren with the basic concepts of a logic element, a trigger and a clock frequency signal. This is the same, but on the technology of the 2010s:
The fact is that inside the FPGA there is essentially a constructor of thousands of logic elements like the elements in K1553, but in the FPGA you can connect them not with your hands using wires, but by changing the contents of the special memory, bits that are connected to multiplexers that change the logical functions of FPGA cells and connections between them:
Where can I get the boards, the software for development and the necessary plug-ins, I will tell at the end, and now we dive directly into creating a simple scheme using the free Xilinx ISE WebPACK development environment:
Enter and create a new project:
It is important to choose a separate directory for the project and not to mix it with your source files, because the synthesizer generates many different temporary files and you can get confused in them (all of them can be deleted after use):
Enter the name of the project. This name is the same as the name of the main module on Verilog (iron description language):
Enter the FPGA parameters: Family, Device, Package, Speed. They need to be taken from the documentation on the board.
Project created by:
Add source files in the Verilog hardware description language.
The top.v file contains the schema description:
module top
(
input btn_0,
input btn_1,
output led_0,
output led_1,
output led_2,
output led_3
);
assign led_0 = btn_0;
assign led_1 = btn_1;
assign led_2 = btn_0 & btn_1;
assign led_3 = btn_0 | btn_1;
endmodule
The cmods6.ucf file contains information for the development environment about how the logical inputs and outputs of the main module (btn_0, led_2, ...) are associated with the location (location, LOC) of the physical legs of the FPGA chip, called P8, N4, etc. . This file is a stripped-down version of the file for this board, downloaded from the Digilent website (motherboard manufacturer):
NET "btn_0" LOC = "P8" | IOSTANDARD = LVCMOS33; NET "btn_1" LOC = "P9" | IOSTANDARD = LVCMOS33; NET "led_0" LOC = "N3" | IOSTANDARD = LVCMOS33; NET "led_1" LOC = "P3" | IOSTANDARD = LVCMOS33; NET "led_2" LOC = "N4" | IOSTANDARD = LVCMOS33; NET "led_3" LOC = "P4" | IOSTANDARD = LVCMOS33;
Now we will click on the button “generate a file for programming the FPGA”. There is an important point here - “programming” is not software-based software programming, which boils down to creating a sequence of commands for a certain processor. Programming File in this case is the content of the memory in the FPGA, which defines the logical functions and connections of the FPGA cells. The processor is not present in this scheme (although you can create a processor yourself by programming (in the above sense) FPGA cells).
Now press the button “look at the abstract (not tied to a specific FPGA) scheme described on the verilog and synthesized by software):
Top module:
Click on the mouse to look inside:
Click on the "Zoom to Full View" button to see the whole scheme:
And now let's take a look at the revised scheme generated by software for a specific FPGA (View Technology-Specific):
We see the word LUT - this is the Look-Up Table - you need to remember it for the future:
Now we’ll click on the “View / Edit Routed Design (FPGA Editor)” button to see how the diagram will fit into the FPGA cells:
Larger:
Click the button to configure the FPGA. The board is attached with a micro USB cable to the computer.
From this point on, it is important that the plug-in from Digilent is installed for this board - digilentinc.com/Products/Detail.cfm?NavPath=2 , 66,768 & Prod = DIGILENT-PLUGIN
Digilent also has a software called Digilent Adept, but for some reason it doesn’t work on my computer with this board, so it’s better to use the plugin and iMPACT. The sequence of actions below is not necessary to understand, it’s just “magic spells” to transfer the * .bit file to the configuration memory inside the FPGA:
Everything, now the board should work - respond to button presses and blink lights accordingly.
Now, let's not close iMPACT, go back to the ISE main window and build not a combinational, but a sequential circuit - a shift register. We use a low frequency clock signal generator 1 Hz, i.e. once a second. The board still has a clock signal generator at 8 MHz - this frequency can be raised to 200 MHz using a PLL. But the high frequency is of other designs, and for clarity, 1 Hz is what you need:
Synthesize it, generate a bit-file, go back to iMPACT and click on the Program button. It will say:
You need to click Yes and a new design will be loaded into the FPGA. By the way, theoretically repeated (after the creation of the iMPACT project) loading should occur simply by clicking Configure Target Device in the main ISE window, but really it does not happen for me - software tries to create a new iMPACT project. Therefore, it is better to use the Program button inside the iMPACT window. All complaints about this are in Digilent and Xilinx.
Appendix A. Two videos - how to implement a shift register and counter
Appendix B. Full header of the top module on the verification for this board
With all the links and comments:
module cmods6
(
input CLK, // FPGA_GCLK, 8MHz - can be raised to 200 MHz
input CLK_LFC, // FPGA_LFC, 1 Hz
output LED_0, // Four lights
output LED_1,
output LED_2,
output LED_3,
input BTN_0, // Two buttons
input BTN_1,
// DEPP interface - interface for communicating with PC via USB
input DEPP_ASTB, // Address strobe
input DEPP_DSTB, // Data strobe
input DEPP_WRITE, // Write enable (write operation = 0, read operation = 1)
output DEPP_WAIT, // Ready
inout [7: 0] DBUS,
// General purpose I / O - a bunch of pins for brainboards
input [7: 0] PORTA,
input [7: 0] PORTB,
output [6: 0] PORTC,
input [7: 0] PORTD,
input [7: 0] PORTE,
output [6: 0] PORTF
);
Appendix C. Where to get fees
Xilinx FPGA boards can be borrowed on the Digilent website, now it's a National Instruments unit. Here is a Digilent Cmod S6 board that I used in a post, with the smallest Xilinx Spartan-6 FPGA:
For further training, there are for example Nexys 4 boards with more powerful Xilinx Artix-7 FPGAs. They do not need to twist the wires on the breadboard, since this stage of training has already passed:
About boards with Altera FPGA I will write another post.
Appendix D. Where to get the Xilinx ISE software
It can be downloaded directly from the Xilinx website. You can use the free version. But for Spartan-6, you need to use not the newest version of the Xilinx Vivado 2014.4 development environment, but the Xilinx ISE 14.7 of 2013. Why not Vivado? Marketers at Xilinx decided to transfer all users of Spartan chips to newer Artix FPGAs, and turned off support for Spartan from the new software. But Artix doesn’t have any boards that can be inserted into a prototyping board. Therefore, you need to use the 2013 version of the software:
But the Xilinx Vivado software which supports the Nexys 4 with the Xilinx Artix-7 in particular (it is not needed for the Spartan-6 card):
Now an important point. To upload a .bit file to the FPGA configuration memory on the board, you need to download a special plugin from the Digilent website:
The site still has Digilent Adept software, but I do not recommend it for Spartan-6, I had problems with it.
Appendix E. Some FPGA Parameters Labels
And finally, another photo of the FPGA board on a breadboard with buttons, resistors and a seven-segment indicator:
Source: https://habr.com/ru/post/250511/
All Articles