AMD is preparing SSE5 instructions
According to a recent post by a number of Western IT publications, AMD intends to complement the x86 architecture with a set of commands under the designation SSE5 . Including 50 teams of new instructions are expected to allow developers of gaming and multimedia applications to significantly simplify the code and improve the efficiency of the final products.
One of the main features of SSE5 is the increased number of operands from two to three, which until now was typical only for some RISC platforms. This, in particular, will allow to combine several simple instructions into one, which in turn will increase productivity. It is possible that SSE5 support will be included in AMD processors codenamed Bulldozer, which are expected to be released in 2009.
Obviously, not without cooperation with Intel.
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via CNET News.com
One of the main features of SSE5 is the increased number of operands from two to three, which until now was typical only for some RISC platforms. This, in particular, will allow to combine several simple instructions into one, which in turn will increase productivity. It is possible that SSE5 support will be included in AMD processors codenamed Bulldozer, which are expected to be released in 2009.
Obviously, not without cooperation with Intel.
')
via CNET News.com
Source: https://habr.com/ru/post/13709/
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