New details about Poulson

At the HotChips conference in California, Intel representatives unveiled new processor details, codenamed Poulson (the next generation Itanium). At the beginning of this year, the corporation has already announced that Poulson will consist of eight processor cores and will be manufactured using 32-nanometer technology. It will be 3.1 billion transistors (for comparison - in the processor of the second generation Core i7 about one billion transistors).

Of course, the Itanium announcements are primarily important for those customers who use HP Integrity servers with IA64 architecture processors, however, for users of servers with Intel Xeon processors, the Itanium novelties are also of some interest, because Intel often transfers Itanium technology to the x86 platform. In addition, in the current generation of the Itanium 9300 series there are many common components with Xeon, for example, QuickPath Interconnect, Scalable Memory Interconnects, Intel 7500 Scalable Memory Buffer, DDR3 and finally the Intel 7500 chipset.

So, what is new now announced by Intel? First, Itanium's fault tolerance (and HP Integrity along with it, which business-critical applications are most often deployed) should increase Instruction Replay command re-execution technology, which is based on a new command pipeline architecture that extends the ability to detect command errors. When an error is detected, the command is re-called for execution from the command buffer. Thanks to improvements in the command buffer, it has become possible for Hyper-Threading to support threading commands in two domains for multi-threading. The EPIC (Explicit Parallel Instruction Computing) architecture used in processors based on the IA64 architecture has always been distinguished by enhanced support for parallel execution of commands, but in Poulson this support will become even more powerful.

  Instruction Reply Hyper-Threading 

Poulson's third key enhancement is new processor instructions. Firstly, these are new commands for working with integers (mpy4, mpyshl4, clz). Secondly, these are commands based on advanced parallelization and multi-threading Data Access Hints (mov dahr), Expanded Software Prefetch (ifetch.count) and Thread Control (hint @ priority).

Poulson will be released next year, but already this year, participants in the June Discover HP forum in Las Vegas could see prototypes of servers based on the new processor.
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In parallel with Poulson, Intel engineers are developing the next generation of Itanium (codename Kittson). Recall that Poulson and Kittson will be fully compatible with the current Itanium 9300 series (codename Tukwila) by program code, so owners of HP Integrity released last year using Itanium 9300 series, including Superdome 2, will be able to upgrade their servers without any problems for applications already running there.

Poulson's Hot Chips presentation can be viewed here.