Toshiba Develops New Energy Saving Triggers
A new energy-saving trigger circuit is being developed based on the 40 nm CMOS process. Its use will reduce energy consumption in mobile devices. Studies have shown that in the new scheme, the power dissipation is 77% less, and the reduction in power consumption in the wireless communication module was 24%.
A trigger (Flip-Flop) is an electronic circuit widely used in computer registers for reliably memorizing a binary code bit. A trigger has two steady states, one of which corresponds to a binary one, and the other to binary zero. Typical "system-on-chip" uses from 100 thousand to 10 million triggers, which are a necessary part of the design. A regular trigger is embedded in the synchronization buffer in order to transmit a signal along the circuit.
Traditional scheme
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In order to save energy, Toshiba changed the structure of the standard trigger and removed the synchronization buffer. This approach creates a problem of information dispersion between the data recording circuit and the state of the circuit in the trigger, which Toshiba overcame by adding an adapted binding circuit to the trigger. The combination of nMOS and pMOS transistors weakens
collision currents.
New configuration
Despite the addition of an adaptive coupling circuit, the overall simplification of the basic configuration reduces the number of transistors from 24 to 22, and the cell area is smaller than in a conventional trigger.
A trigger (Flip-Flop) is an electronic circuit widely used in computer registers for reliably memorizing a binary code bit. A trigger has two steady states, one of which corresponds to a binary one, and the other to binary zero. Typical "system-on-chip" uses from 100 thousand to 10 million triggers, which are a necessary part of the design. A regular trigger is embedded in the synchronization buffer in order to transmit a signal along the circuit.
Traditional scheme
')
In order to save energy, Toshiba changed the structure of the standard trigger and removed the synchronization buffer. This approach creates a problem of information dispersion between the data recording circuit and the state of the circuit in the trigger, which Toshiba overcame by adding an adapted binding circuit to the trigger. The combination of nMOS and pMOS transistors weakens
collision currents.
New configuration
Despite the addition of an adaptive coupling circuit, the overall simplification of the basic configuration reduces the number of transistors from 24 to 22, and the cell area is smaller than in a conventional trigger.
Source: https://habr.com/ru/post/114716/
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